A self-developed OS
| devlog | ||
| include | ||
| kernel | ||
| .clangd | ||
| .gitignore | ||
| LICENSE | ||
| linker.ld | ||
| Makefile | ||
| README.md | ||
| releases.md | ||
| virt.dts | ||
FrostVista OS / 霜见内核 ❄️
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FrostVistaOS booting...
Hello FrostVista OS!
Paging enable successfully
Successfully jumped to high address!
Current SP: 0xffffffc080006020
FrostVista is a lightweight, educational operating system kernel targeting RISC-V 64 (Sv39).
Unlike typical hobby kernels that stay in physical memory, FrostVista implements a Higher Half Kernel architecture. It boots in M-mode, enables paging, cleans up identity mappings, and executes strictly in the upper virtual address space (0xFFFFFFC080000000).
🚀 Current Status (v0.1 - Memory Milestone)
The kernel has successfully achieved Self-Hosting Memory Management:
- UART Driver: MMIO based serial output.
- Boot Memory Allocator: Simple bump-pointer allocator (
ekalloc) for early page table creation. - Sv39 Paging: 3-level page tables with Sv39 standard.
- Higher Half Mapping: Kernel mapped to
0xFFFFFFC080000000. - The "Leap of Faith": Safe transition from physical PC to high-virtual PC.
- Cleanup: Identity mappings are removed after boot for a clean virtual space.
- Trap & Interrupts: (Work In Progress) Timer and external interrupts.
- UART Interrupts Handling
- Mini User Mode: Minimal implementration from S mode to U mode.
- Process Management and Scheduling
🛠 Memory Layout
FrostVista utilizes the Sv39 virtual addressing scheme:
0xFFFFFFC080000000 -> Kernel Base (Virtual)
| maps to
0x0000000080000000 -> Physical RAM Start
🏗 Build & Run
Requirements:
riscv64-unknown-elf-gcc(or similar cross-compiler)qemu-system-riscv64make
To build and launch QEMU:
make run
You should see the kernel enabling paging and jumping to the higher half address space in the serial console.
📜 Philosophy
- Clarity over Cleverness: Code is written to be understood.
- Architecture First: Implementing proper OS concepts (Virtual Memory, Traps) rather than hacking features.
- From Scratch: Minimizing external dependencies to understand the hardware.